151 #define RTE_ETHDEV_HAS_LRO_SUPPORT
154 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
155 #define RTE_ETHDEV_DEBUG_RX
156 #define RTE_ETHDEV_DEBUG_TX
160 #include <rte_compat.h>
168 #include <rte_config.h>
172 #include "rte_dev_info.h"
178 extern int rte_eth_dev_logtype;
179 #define RTE_LOGTYPE_ETHDEV rte_eth_dev_logtype
181 #define RTE_ETHDEV_LOG_LINE(level, ...) \
182 RTE_LOG_LINE(level, ETHDEV, "" __VA_ARGS__)
247 #define RTE_ETH_FOREACH_MATCHING_DEV(id, devargs, iter) \
248 for (rte_eth_iterator_init(iter, devargs), \
249 id = rte_eth_iterator_next(iter); \
250 id != RTE_MAX_ETHPORTS; \
251 id = rte_eth_iterator_next(iter))
291 #define RTE_ETH_LINK_SPEED_AUTONEG 0
292 #define RTE_ETH_LINK_SPEED_FIXED RTE_BIT32(0)
293 #define RTE_ETH_LINK_SPEED_10M_HD RTE_BIT32(1)
294 #define RTE_ETH_LINK_SPEED_10M RTE_BIT32(2)
295 #define RTE_ETH_LINK_SPEED_100M_HD RTE_BIT32(3)
296 #define RTE_ETH_LINK_SPEED_100M RTE_BIT32(4)
297 #define RTE_ETH_LINK_SPEED_1G RTE_BIT32(5)
298 #define RTE_ETH_LINK_SPEED_2_5G RTE_BIT32(6)
299 #define RTE_ETH_LINK_SPEED_5G RTE_BIT32(7)
300 #define RTE_ETH_LINK_SPEED_10G RTE_BIT32(8)
301 #define RTE_ETH_LINK_SPEED_20G RTE_BIT32(9)
302 #define RTE_ETH_LINK_SPEED_25G RTE_BIT32(10)
303 #define RTE_ETH_LINK_SPEED_40G RTE_BIT32(11)
304 #define RTE_ETH_LINK_SPEED_50G RTE_BIT32(12)
305 #define RTE_ETH_LINK_SPEED_56G RTE_BIT32(13)
306 #define RTE_ETH_LINK_SPEED_100G RTE_BIT32(14)
307 #define RTE_ETH_LINK_SPEED_200G RTE_BIT32(15)
308 #define RTE_ETH_LINK_SPEED_400G RTE_BIT32(16)
314 #define RTE_ETH_SPEED_NUM_NONE 0
315 #define RTE_ETH_SPEED_NUM_10M 10
316 #define RTE_ETH_SPEED_NUM_100M 100
317 #define RTE_ETH_SPEED_NUM_1G 1000
318 #define RTE_ETH_SPEED_NUM_2_5G 2500
319 #define RTE_ETH_SPEED_NUM_5G 5000
320 #define RTE_ETH_SPEED_NUM_10G 10000
321 #define RTE_ETH_SPEED_NUM_20G 20000
322 #define RTE_ETH_SPEED_NUM_25G 25000
323 #define RTE_ETH_SPEED_NUM_40G 40000
324 #define RTE_ETH_SPEED_NUM_50G 50000
325 #define RTE_ETH_SPEED_NUM_56G 56000
326 #define RTE_ETH_SPEED_NUM_100G 100000
327 #define RTE_ETH_SPEED_NUM_200G 200000
328 #define RTE_ETH_SPEED_NUM_400G 400000
329 #define RTE_ETH_SPEED_NUM_UNKNOWN UINT32_MAX
335 struct rte_eth_link {
337 RTE_ATOMIC(uint64_t) val64;
341 uint16_t link_duplex : 1;
342 uint16_t link_autoneg : 1;
343 uint16_t link_status : 1;
351 #define RTE_ETH_LINK_HALF_DUPLEX 0
352 #define RTE_ETH_LINK_FULL_DUPLEX 1
353 #define RTE_ETH_LINK_DOWN 0
354 #define RTE_ETH_LINK_UP 1
355 #define RTE_ETH_LINK_FIXED 0
356 #define RTE_ETH_LINK_AUTONEG 1
357 #define RTE_ETH_LINK_MAX_STR_LEN 40
361 #define RTE_ETH_SPEED_LANES_TO_CAPA(x) RTE_BIT32(x)
382 #define RTE_ETH_MQ_RX_RSS_FLAG RTE_BIT32(0)
383 #define RTE_ETH_MQ_RX_DCB_FLAG RTE_BIT32(1)
384 #define RTE_ETH_MQ_RX_VMDQ_FLAG RTE_BIT32(2)
391 enum rte_eth_rx_mq_mode {
449 RTE_ETH_VLAN_TYPE_UNKNOWN = 0,
452 RTE_ETH_VLAN_TYPE_MAX,
484 RTE_ETH_HASH_FUNCTION_MAX,
487 #define RTE_ETH_HASH_ALGO_TO_CAPA(x) RTE_BIT32(x)
488 #define RTE_ETH_HASH_ALGO_CAPA_MASK(x) RTE_BIT32(RTE_ETH_HASH_FUNCTION_ ## x)
525 #define RTE_ETH_FLOW_UNKNOWN 0
526 #define RTE_ETH_FLOW_RAW 1
527 #define RTE_ETH_FLOW_IPV4 2
528 #define RTE_ETH_FLOW_FRAG_IPV4 3
529 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4
530 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5
531 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6
532 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7
533 #define RTE_ETH_FLOW_IPV6 8
534 #define RTE_ETH_FLOW_FRAG_IPV6 9
535 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10
536 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11
537 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12
538 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
539 #define RTE_ETH_FLOW_L2_PAYLOAD 14
540 #define RTE_ETH_FLOW_IPV6_EX 15
541 #define RTE_ETH_FLOW_IPV6_TCP_EX 16
542 #define RTE_ETH_FLOW_IPV6_UDP_EX 17
544 #define RTE_ETH_FLOW_PORT 18
545 #define RTE_ETH_FLOW_VXLAN 19
546 #define RTE_ETH_FLOW_GENEVE 20
547 #define RTE_ETH_FLOW_NVGRE 21
548 #define RTE_ETH_FLOW_VXLAN_GPE 22
549 #define RTE_ETH_FLOW_GTPU 23
550 #define RTE_ETH_FLOW_MAX 24
556 #define RTE_ETH_RSS_IPV4 RTE_BIT64(2)
557 #define RTE_ETH_RSS_FRAG_IPV4 RTE_BIT64(3)
558 #define RTE_ETH_RSS_NONFRAG_IPV4_TCP RTE_BIT64(4)
559 #define RTE_ETH_RSS_NONFRAG_IPV4_UDP RTE_BIT64(5)
560 #define RTE_ETH_RSS_NONFRAG_IPV4_SCTP RTE_BIT64(6)
561 #define RTE_ETH_RSS_NONFRAG_IPV4_OTHER RTE_BIT64(7)
562 #define RTE_ETH_RSS_IPV6 RTE_BIT64(8)
563 #define RTE_ETH_RSS_FRAG_IPV6 RTE_BIT64(9)
564 #define RTE_ETH_RSS_NONFRAG_IPV6_TCP RTE_BIT64(10)
565 #define RTE_ETH_RSS_NONFRAG_IPV6_UDP RTE_BIT64(11)
566 #define RTE_ETH_RSS_NONFRAG_IPV6_SCTP RTE_BIT64(12)
567 #define RTE_ETH_RSS_NONFRAG_IPV6_OTHER RTE_BIT64(13)
568 #define RTE_ETH_RSS_L2_PAYLOAD RTE_BIT64(14)
569 #define RTE_ETH_RSS_IPV6_EX RTE_BIT64(15)
570 #define RTE_ETH_RSS_IPV6_TCP_EX RTE_BIT64(16)
571 #define RTE_ETH_RSS_IPV6_UDP_EX RTE_BIT64(17)
572 #define RTE_ETH_RSS_PORT RTE_BIT64(18)
573 #define RTE_ETH_RSS_VXLAN RTE_BIT64(19)
574 #define RTE_ETH_RSS_GENEVE RTE_BIT64(20)
575 #define RTE_ETH_RSS_NVGRE RTE_BIT64(21)
576 #define RTE_ETH_RSS_GTPU RTE_BIT64(23)
577 #define RTE_ETH_RSS_ETH RTE_BIT64(24)
578 #define RTE_ETH_RSS_S_VLAN RTE_BIT64(25)
579 #define RTE_ETH_RSS_C_VLAN RTE_BIT64(26)
580 #define RTE_ETH_RSS_ESP RTE_BIT64(27)
581 #define RTE_ETH_RSS_AH RTE_BIT64(28)
582 #define RTE_ETH_RSS_L2TPV3 RTE_BIT64(29)
583 #define RTE_ETH_RSS_PFCP RTE_BIT64(30)
584 #define RTE_ETH_RSS_PPPOE RTE_BIT64(31)
585 #define RTE_ETH_RSS_ECPRI RTE_BIT64(32)
586 #define RTE_ETH_RSS_MPLS RTE_BIT64(33)
587 #define RTE_ETH_RSS_IPV4_CHKSUM RTE_BIT64(34)
601 #define RTE_ETH_RSS_L4_CHKSUM RTE_BIT64(35)
603 #define RTE_ETH_RSS_L2TPV2 RTE_BIT64(36)
604 #define RTE_ETH_RSS_IPV6_FLOW_LABEL RTE_BIT64(37)
615 #define RTE_ETH_RSS_L3_SRC_ONLY RTE_BIT64(63)
616 #define RTE_ETH_RSS_L3_DST_ONLY RTE_BIT64(62)
617 #define RTE_ETH_RSS_L4_SRC_ONLY RTE_BIT64(61)
618 #define RTE_ETH_RSS_L4_DST_ONLY RTE_BIT64(60)
619 #define RTE_ETH_RSS_L2_SRC_ONLY RTE_BIT64(59)
620 #define RTE_ETH_RSS_L2_DST_ONLY RTE_BIT64(58)
628 #define RTE_ETH_RSS_L3_PRE32 RTE_BIT64(57)
629 #define RTE_ETH_RSS_L3_PRE40 RTE_BIT64(56)
630 #define RTE_ETH_RSS_L3_PRE48 RTE_BIT64(55)
631 #define RTE_ETH_RSS_L3_PRE56 RTE_BIT64(54)
632 #define RTE_ETH_RSS_L3_PRE64 RTE_BIT64(53)
633 #define RTE_ETH_RSS_L3_PRE96 RTE_BIT64(52)
648 #define RTE_ETH_RSS_LEVEL_PMD_DEFAULT (UINT64_C(0) << 50)
654 #define RTE_ETH_RSS_LEVEL_OUTERMOST (UINT64_C(1) << 50)
660 #define RTE_ETH_RSS_LEVEL_INNERMOST (UINT64_C(2) << 50)
661 #define RTE_ETH_RSS_LEVEL_MASK (UINT64_C(3) << 50)
663 #define RTE_ETH_RSS_LEVEL(rss_hf) ((rss_hf & RTE_ETH_RSS_LEVEL_MASK) >> 50)
675 static inline uint64_t
678 if ((rss_hf & RTE_ETH_RSS_L3_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L3_DST_ONLY))
679 rss_hf &= ~(RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY);
681 if ((rss_hf & RTE_ETH_RSS_L4_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L4_DST_ONLY))
682 rss_hf &= ~(RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY);
687 #define RTE_ETH_RSS_IPV6_PRE32 ( \
689 RTE_ETH_RSS_L3_PRE32)
691 #define RTE_ETH_RSS_IPV6_PRE40 ( \
693 RTE_ETH_RSS_L3_PRE40)
695 #define RTE_ETH_RSS_IPV6_PRE48 ( \
697 RTE_ETH_RSS_L3_PRE48)
699 #define RTE_ETH_RSS_IPV6_PRE56 ( \
701 RTE_ETH_RSS_L3_PRE56)
703 #define RTE_ETH_RSS_IPV6_PRE64 ( \
705 RTE_ETH_RSS_L3_PRE64)
707 #define RTE_ETH_RSS_IPV6_PRE96 ( \
709 RTE_ETH_RSS_L3_PRE96)
711 #define RTE_ETH_RSS_IPV6_PRE32_UDP ( \
712 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
713 RTE_ETH_RSS_L3_PRE32)
715 #define RTE_ETH_RSS_IPV6_PRE40_UDP ( \
716 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
717 RTE_ETH_RSS_L3_PRE40)
719 #define RTE_ETH_RSS_IPV6_PRE48_UDP ( \
720 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
721 RTE_ETH_RSS_L3_PRE48)
723 #define RTE_ETH_RSS_IPV6_PRE56_UDP ( \
724 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
725 RTE_ETH_RSS_L3_PRE56)
727 #define RTE_ETH_RSS_IPV6_PRE64_UDP ( \
728 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
729 RTE_ETH_RSS_L3_PRE64)
731 #define RTE_ETH_RSS_IPV6_PRE96_UDP ( \
732 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
733 RTE_ETH_RSS_L3_PRE96)
735 #define RTE_ETH_RSS_IPV6_PRE32_TCP ( \
736 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
737 RTE_ETH_RSS_L3_PRE32)
739 #define RTE_ETH_RSS_IPV6_PRE40_TCP ( \
740 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
741 RTE_ETH_RSS_L3_PRE40)
743 #define RTE_ETH_RSS_IPV6_PRE48_TCP ( \
744 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
745 RTE_ETH_RSS_L3_PRE48)
747 #define RTE_ETH_RSS_IPV6_PRE56_TCP ( \
748 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
749 RTE_ETH_RSS_L3_PRE56)
751 #define RTE_ETH_RSS_IPV6_PRE64_TCP ( \
752 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
753 RTE_ETH_RSS_L3_PRE64)
755 #define RTE_ETH_RSS_IPV6_PRE96_TCP ( \
756 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
757 RTE_ETH_RSS_L3_PRE96)
759 #define RTE_ETH_RSS_IPV6_PRE32_SCTP ( \
760 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
761 RTE_ETH_RSS_L3_PRE32)
763 #define RTE_ETH_RSS_IPV6_PRE40_SCTP ( \
764 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
765 RTE_ETH_RSS_L3_PRE40)
767 #define RTE_ETH_RSS_IPV6_PRE48_SCTP ( \
768 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
769 RTE_ETH_RSS_L3_PRE48)
771 #define RTE_ETH_RSS_IPV6_PRE56_SCTP ( \
772 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
773 RTE_ETH_RSS_L3_PRE56)
775 #define RTE_ETH_RSS_IPV6_PRE64_SCTP ( \
776 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
777 RTE_ETH_RSS_L3_PRE64)
779 #define RTE_ETH_RSS_IPV6_PRE96_SCTP ( \
780 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
781 RTE_ETH_RSS_L3_PRE96)
783 #define RTE_ETH_RSS_IP ( \
785 RTE_ETH_RSS_FRAG_IPV4 | \
786 RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \
788 RTE_ETH_RSS_FRAG_IPV6 | \
789 RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
792 #define RTE_ETH_RSS_UDP ( \
793 RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
794 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
795 RTE_ETH_RSS_IPV6_UDP_EX)
797 #define RTE_ETH_RSS_TCP ( \
798 RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
799 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
800 RTE_ETH_RSS_IPV6_TCP_EX)
802 #define RTE_ETH_RSS_SCTP ( \
803 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \
804 RTE_ETH_RSS_NONFRAG_IPV6_SCTP)
806 #define RTE_ETH_RSS_TUNNEL ( \
807 RTE_ETH_RSS_VXLAN | \
808 RTE_ETH_RSS_GENEVE | \
811 #define RTE_ETH_RSS_VLAN ( \
812 RTE_ETH_RSS_S_VLAN | \
816 #define RTE_ETH_RSS_PROTO_MASK ( \
818 RTE_ETH_RSS_FRAG_IPV4 | \
819 RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
820 RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
821 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \
822 RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \
824 RTE_ETH_RSS_FRAG_IPV6 | \
825 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
826 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
827 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
828 RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
829 RTE_ETH_RSS_L2_PAYLOAD | \
830 RTE_ETH_RSS_IPV6_EX | \
831 RTE_ETH_RSS_IPV6_TCP_EX | \
832 RTE_ETH_RSS_IPV6_UDP_EX | \
834 RTE_ETH_RSS_VXLAN | \
835 RTE_ETH_RSS_GENEVE | \
836 RTE_ETH_RSS_NVGRE | \
844 #define RTE_ETH_RSS_RETA_SIZE_64 64
845 #define RTE_ETH_RSS_RETA_SIZE_128 128
846 #define RTE_ETH_RSS_RETA_SIZE_256 256
847 #define RTE_ETH_RSS_RETA_SIZE_512 512
848 #define RTE_ETH_RETA_GROUP_SIZE 64
851 #define RTE_ETH_VMDQ_MAX_VLAN_FILTERS 64
852 #define RTE_ETH_DCB_NUM_USER_PRIORITIES 8
853 #define RTE_ETH_VMDQ_DCB_NUM_QUEUES 128
854 #define RTE_ETH_DCB_NUM_QUEUES 128
858 #define RTE_ETH_DCB_PG_SUPPORT RTE_BIT32(0)
859 #define RTE_ETH_DCB_PFC_SUPPORT RTE_BIT32(1)
863 #define RTE_ETH_VLAN_STRIP_OFFLOAD 0x0001
864 #define RTE_ETH_VLAN_FILTER_OFFLOAD 0x0002
865 #define RTE_ETH_VLAN_EXTEND_OFFLOAD 0x0004
866 #define RTE_ETH_QINQ_STRIP_OFFLOAD 0x0008
868 #define RTE_ETH_VLAN_STRIP_MASK 0x0001
869 #define RTE_ETH_VLAN_FILTER_MASK 0x0002
870 #define RTE_ETH_VLAN_EXTEND_MASK 0x0004
871 #define RTE_ETH_QINQ_STRIP_MASK 0x0008
872 #define RTE_ETH_VLAN_ID_MAX 0x0FFF
876 #define RTE_ETH_NUM_RECEIVE_MAC_ADDR 128
879 #define RTE_ETH_VMDQ_NUM_UC_HASH_ARRAY 128
885 #define RTE_ETH_VMDQ_ACCEPT_UNTAG RTE_BIT32(0)
887 #define RTE_ETH_VMDQ_ACCEPT_HASH_MC RTE_BIT32(1)
889 #define RTE_ETH_VMDQ_ACCEPT_HASH_UC RTE_BIT32(2)
891 #define RTE_ETH_VMDQ_ACCEPT_BROADCAST RTE_BIT32(3)
893 #define RTE_ETH_VMDQ_ACCEPT_MULTICAST RTE_BIT32(4)
906 uint16_t
reta[RTE_ETH_RETA_GROUP_SIZE];
930 struct rte_eth_dcb_rx_conf {
936 struct rte_eth_vmdq_dcb_tx_conf {
942 struct rte_eth_dcb_tx_conf {
948 struct rte_eth_vmdq_tx_conf {
1174 uint16_t rx_nmempool;
1241 #define RTE_ETH_MAX_HAIRPIN_PEERS 32
1455 RTE_ETH_TUNNEL_TYPE_NONE = 0,
1456 RTE_ETH_TUNNEL_TYPE_VXLAN,
1457 RTE_ETH_TUNNEL_TYPE_GENEVE,
1458 RTE_ETH_TUNNEL_TYPE_TEREDO,
1459 RTE_ETH_TUNNEL_TYPE_NVGRE,
1460 RTE_ETH_TUNNEL_TYPE_IP_IN_GRE,
1461 RTE_ETH_L2_TUNNEL_TYPE_E_TAG,
1462 RTE_ETH_TUNNEL_TYPE_VXLAN_GPE,
1463 RTE_ETH_TUNNEL_TYPE_ECPRI,
1464 RTE_ETH_TUNNEL_TYPE_MAX,
1504 #define rte_intr_conf rte_eth_intr_conf
1552 #define RTE_ETH_RX_OFFLOAD_VLAN_STRIP RTE_BIT64(0)
1553 #define RTE_ETH_RX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1)
1554 #define RTE_ETH_RX_OFFLOAD_UDP_CKSUM RTE_BIT64(2)
1555 #define RTE_ETH_RX_OFFLOAD_TCP_CKSUM RTE_BIT64(3)
1556 #define RTE_ETH_RX_OFFLOAD_TCP_LRO RTE_BIT64(4)
1557 #define RTE_ETH_RX_OFFLOAD_QINQ_STRIP RTE_BIT64(5)
1558 #define RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(6)
1559 #define RTE_ETH_RX_OFFLOAD_MACSEC_STRIP RTE_BIT64(7)
1560 #define RTE_ETH_RX_OFFLOAD_VLAN_FILTER RTE_BIT64(9)
1561 #define RTE_ETH_RX_OFFLOAD_VLAN_EXTEND RTE_BIT64(10)
1562 #define RTE_ETH_RX_OFFLOAD_SCATTER RTE_BIT64(13)
1568 #define RTE_ETH_RX_OFFLOAD_TIMESTAMP RTE_BIT64(14)
1569 #define RTE_ETH_RX_OFFLOAD_SECURITY RTE_BIT64(15)
1570 #define RTE_ETH_RX_OFFLOAD_KEEP_CRC RTE_BIT64(16)
1571 #define RTE_ETH_RX_OFFLOAD_SCTP_CKSUM RTE_BIT64(17)
1572 #define RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(18)
1573 #define RTE_ETH_RX_OFFLOAD_RSS_HASH RTE_BIT64(19)
1574 #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT RTE_BIT64(20)
1576 #define RTE_ETH_RX_OFFLOAD_CHECKSUM (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \
1577 RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \
1578 RTE_ETH_RX_OFFLOAD_TCP_CKSUM)
1579 #define RTE_ETH_RX_OFFLOAD_VLAN (RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \
1580 RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \
1581 RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | \
1582 RTE_ETH_RX_OFFLOAD_QINQ_STRIP)
1592 #define RTE_ETH_TX_OFFLOAD_VLAN_INSERT RTE_BIT64(0)
1593 #define RTE_ETH_TX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1)
1594 #define RTE_ETH_TX_OFFLOAD_UDP_CKSUM RTE_BIT64(2)
1595 #define RTE_ETH_TX_OFFLOAD_TCP_CKSUM RTE_BIT64(3)
1596 #define RTE_ETH_TX_OFFLOAD_SCTP_CKSUM RTE_BIT64(4)
1597 #define RTE_ETH_TX_OFFLOAD_TCP_TSO RTE_BIT64(5)
1598 #define RTE_ETH_TX_OFFLOAD_UDP_TSO RTE_BIT64(6)
1599 #define RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(7)
1600 #define RTE_ETH_TX_OFFLOAD_QINQ_INSERT RTE_BIT64(8)
1601 #define RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO RTE_BIT64(9)
1602 #define RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO RTE_BIT64(10)
1603 #define RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO RTE_BIT64(11)
1604 #define RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO RTE_BIT64(12)
1605 #define RTE_ETH_TX_OFFLOAD_MACSEC_INSERT RTE_BIT64(13)
1610 #define RTE_ETH_TX_OFFLOAD_MT_LOCKFREE RTE_BIT64(14)
1612 #define RTE_ETH_TX_OFFLOAD_MULTI_SEGS RTE_BIT64(15)
1620 #define RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE RTE_BIT64(16)
1621 #define RTE_ETH_TX_OFFLOAD_SECURITY RTE_BIT64(17)
1627 #define RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO RTE_BIT64(18)
1633 #define RTE_ETH_TX_OFFLOAD_IP_TNL_TSO RTE_BIT64(19)
1635 #define RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(20)
1641 #define RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP RTE_BIT64(21)
1651 #define RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP RTE_BIT64(0)
1653 #define RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP RTE_BIT64(1)
1663 #define RTE_ETH_DEV_CAPA_RXQ_SHARE RTE_BIT64(2)
1665 #define RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP RTE_BIT64(3)
1667 #define RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP RTE_BIT64(4)
1675 #define RTE_ETH_DEV_FALLBACK_RX_RINGSIZE 512
1676 #define RTE_ETH_DEV_FALLBACK_TX_RINGSIZE 512
1677 #define RTE_ETH_DEV_FALLBACK_RX_NBQUEUES 1
1678 #define RTE_ETH_DEV_FALLBACK_TX_NBQUEUES 1
1695 #define RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID (UINT16_MAX)
1814 uint32_t rss_algo_capa;
1854 #define RTE_ETH_QUEUE_STATE_STOPPED 0
1855 #define RTE_ETH_QUEUE_STATE_STARTED 1
1856 #define RTE_ETH_QUEUE_STATE_HAIRPIN 2
1863 struct __rte_cache_min_aligned rte_eth_rxq_info {
1920 #define RTE_ETH_BURST_FLAG_PER_QUEUE RTE_BIT64(0)
1929 #define RTE_ETH_BURST_MODE_INFO_SIZE 1024
1930 char info[RTE_ETH_BURST_MODE_INFO_SIZE];
1934 #define RTE_ETH_XSTATS_NAME_SIZE 64
1968 #define RTE_ETH_DCB_NUM_TCS 8
1969 #define RTE_ETH_MAX_VMDQ_POOL 64
1980 } tc_rxq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
1985 } tc_txq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
1995 uint8_t tc_bws[RTE_ETH_DCB_NUM_TCS];
2013 #define RTE_ETH_FEC_MODE_TO_CAPA(x) RTE_BIT32(x)
2016 #define RTE_ETH_FEC_MODE_CAPA_MASK(x) RTE_BIT32(RTE_ETH_FEC_ ## x)
2019 struct rte_eth_fec_capa {
2024 #define RTE_ETH_ALL RTE_MAX_ETHPORTS
2027 #define RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, retval) do { \
2028 if (!rte_eth_dev_is_valid_port(port_id)) { \
2029 RTE_ETHDEV_LOG_LINE(ERR, "Invalid port_id=%u", port_id); \
2034 #define RTE_ETH_VALID_PORTID_OR_RET(port_id) do { \
2035 if (!rte_eth_dev_is_valid_port(port_id)) { \
2036 RTE_ETHDEV_LOG_LINE(ERR, "Invalid port_id=%u", port_id); \
2064 struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts,
2088 struct rte_mbuf *pkts[], uint16_t nb_pkts,
void *user_param);
2102 struct rte_eth_dev_sriov {
2104 uint8_t nb_q_per_pool;
2105 uint16_t def_vmdq_idx;
2106 uint16_t def_pool_q_idx;
2108 #define RTE_ETH_DEV_SRIOV(dev) ((dev)->data->sriov)
2110 #define RTE_ETH_NAME_MAX_LEN RTE_DEV_NAME_MAX_LEN
2112 #define RTE_ETH_DEV_NO_OWNER 0
2114 #define RTE_ETH_MAX_OWNER_NAME_LEN 64
2116 struct rte_eth_dev_owner {
2118 char name[RTE_ETH_MAX_OWNER_NAME_LEN];
2126 #define RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE RTE_BIT32(0)
2128 #define RTE_ETH_DEV_INTR_LSC RTE_BIT32(1)
2130 #define RTE_ETH_DEV_BONDING_MEMBER RTE_BIT32(2)
2132 #define RTE_ETH_DEV_INTR_RMV RTE_BIT32(3)
2134 #define RTE_ETH_DEV_REPRESENTOR RTE_BIT32(4)
2136 #define RTE_ETH_DEV_NOLIVE_MAC_ADDR RTE_BIT32(5)
2141 #define RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS RTE_BIT32(6)
2156 const uint64_t owner_id);
2161 #define RTE_ETH_FOREACH_DEV_OWNED_BY(p, o) \
2162 for (p = rte_eth_find_next_owned_by(0, o); \
2163 (unsigned int)p < (unsigned int)RTE_MAX_ETHPORTS; \
2164 p = rte_eth_find_next_owned_by(p + 1, o))
2179 #define RTE_ETH_FOREACH_DEV(p) \
2180 RTE_ETH_FOREACH_DEV_OWNED_BY(p, RTE_ETH_DEV_NO_OWNER)
2195 const struct rte_device *parent);
2205 #define RTE_ETH_FOREACH_DEV_OF(port_id, parent) \
2206 for (port_id = rte_eth_find_next_of(0, parent); \
2207 port_id < RTE_MAX_ETHPORTS; \
2208 port_id = rte_eth_find_next_of(port_id + 1, parent))
2234 #define RTE_ETH_FOREACH_DEV_SIBLING(port_id, ref_port_id) \
2235 for (port_id = rte_eth_find_next_sibling(0, ref_port_id); \
2236 port_id < RTE_MAX_ETHPORTS; \
2237 port_id = rte_eth_find_next_sibling(port_id + 1, ref_port_id))
2262 const struct rte_eth_dev_owner *owner);
2275 const uint64_t owner_id);
2298 struct rte_eth_dev_owner *owner);
2409 uint16_t nb_tx_queue,
const struct rte_eth_conf *eth_conf);
2485 uint16_t nb_rx_desc,
unsigned int socket_id,
2518 (uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc,
2570 uint16_t nb_tx_desc,
unsigned int socket_id,
2600 (uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc,
2631 size_t len, uint32_t direction);
3367 uint64_t *values,
unsigned int size);
3455 uint16_t tx_queue_id, uint8_t stat_idx);
3476 uint16_t rx_queue_id,
3622 uint32_t *ptypes,
int num)
3656 uint32_t *set_ptypes,
unsigned int num);
3830 uint8_t avail_thresh);
3860 uint8_t *avail_thresh);
3862 typedef void (*buffer_tx_error_fn)(
struct rte_mbuf **unsent, uint16_t count,
3870 buffer_tx_error_fn error_callback;
3871 void *error_userdata;
3884 #define RTE_ETH_TX_BUFFER_SIZE(sz) \
3885 (sizeof(struct rte_eth_dev_tx_buffer) + (sz) * sizeof(struct rte_mbuf *))
3926 buffer_tx_error_fn callback,
void *userdata);
4380 int epfd,
int op,
void *data);
4459 struct rte_eth_fec_capa *speed_fec_capa,
4647 struct rte_ether_addr *mac_addr);
4667 struct rte_ether_addr *mac_addr);
4688 uint16_t reta_size);
4710 uint16_t reta_size);
4913 struct rte_eth_rxtx_callback;
4940 const struct rte_eth_rxtx_callback *
4970 const struct rte_eth_rxtx_callback *
4999 const struct rte_eth_rxtx_callback *
5037 const struct rte_eth_rxtx_callback *user_cb);
5073 const struct rte_eth_rxtx_callback *user_cb);
5208 struct rte_power_monitor_cond *pmc);
5377 struct rte_ether_addr *mc_addr_set,
5378 uint32_t nb_mc_addr);
5427 struct timespec *timestamp, uint32_t flags);
5445 struct timespec *timestamp);
5649 uint16_t *nb_rx_desc,
5650 uint16_t *nb_tx_desc);
5717 char name[RTE_DEV_NAME_MAX_LEN];
5762 #define RTE_ETH_RX_METADATA_USER_FLAG RTE_BIT64(0)
5765 #define RTE_ETH_RX_METADATA_USER_MARK RTE_BIT64(1)
5768 #define RTE_ETH_RX_METADATA_TUNNEL_ID RTE_BIT64(2)
5812 #define RTE_ETH_DEV_REASSEMBLY_F_IPV4 (RTE_BIT32(0))
5814 #define RTE_ETH_DEV_REASSEMBLY_F_IPV6 (RTE_BIT32(1))
5983 uint16_t offset, uint16_t num, FILE *file);
6010 uint16_t offset, uint16_t num, FILE *file);
6075 uint8_t rsvd_obj_params[4];
6090 uint8_t rsvd_mode_params[4];
6209 uint16_t rte_eth_call_rx_callbacks(uint16_t port_id, uint16_t queue_id,
6210 struct rte_mbuf **rx_pkts, uint16_t nb_rx, uint16_t nb_pkts,
6300 static inline uint16_t
6302 struct rte_mbuf **rx_pkts,
const uint16_t nb_pkts)
6305 struct rte_eth_fp_ops *p;
6308 #ifdef RTE_ETHDEV_DEBUG_RX
6309 if (port_id >= RTE_MAX_ETHPORTS ||
6310 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6311 RTE_ETHDEV_LOG_LINE(ERR,
6312 "Invalid port_id=%u or queue_id=%u",
6319 p = &rte_eth_fp_ops[port_id];
6320 qd = p->rxq.data[queue_id];
6322 #ifdef RTE_ETHDEV_DEBUG_RX
6323 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
6326 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Rx queue_id=%u for port_id=%u",
6332 nb_rx = p->rx_pkt_burst(qd, rx_pkts, nb_pkts);
6334 #ifdef RTE_ETHDEV_RXTX_CALLBACKS
6344 cb = rte_atomic_load_explicit(&p->rxq.clbk[queue_id],
6345 rte_memory_order_relaxed);
6347 nb_rx = rte_eth_call_rx_callbacks(port_id, queue_id,
6348 rx_pkts, nb_rx, nb_pkts, cb);
6353 rte_ethdev_trace_rx_burst_nonempty(port_id, queue_id, (
void **)rx_pkts, nb_rx);
6355 rte_ethdev_trace_rx_burst_empty(port_id, queue_id, (
void **)rx_pkts);
6379 struct rte_eth_fp_ops *p;
6382 #ifdef RTE_ETHDEV_DEBUG_RX
6383 if (port_id >= RTE_MAX_ETHPORTS ||
6384 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6385 RTE_ETHDEV_LOG_LINE(ERR,
6386 "Invalid port_id=%u or queue_id=%u",
6393 p = &rte_eth_fp_ops[port_id];
6394 qd = p->rxq.data[queue_id];
6396 #ifdef RTE_ETHDEV_DEBUG_RX
6397 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6402 if (p->rx_queue_count == NULL)
6404 return (
int)p->rx_queue_count(qd);
6410 #define RTE_ETH_RX_DESC_AVAIL 0
6411 #define RTE_ETH_RX_DESC_DONE 1
6412 #define RTE_ETH_RX_DESC_UNAVAIL 2
6452 struct rte_eth_fp_ops *p;
6455 #ifdef RTE_ETHDEV_DEBUG_RX
6456 if (port_id >= RTE_MAX_ETHPORTS ||
6457 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6458 RTE_ETHDEV_LOG_LINE(ERR,
6459 "Invalid port_id=%u or queue_id=%u",
6466 p = &rte_eth_fp_ops[port_id];
6467 qd = p->rxq.data[queue_id];
6469 #ifdef RTE_ETHDEV_DEBUG_RX
6470 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6474 if (p->rx_descriptor_status == NULL)
6476 return p->rx_descriptor_status(qd, offset);
6482 #define RTE_ETH_TX_DESC_FULL 0
6483 #define RTE_ETH_TX_DESC_DONE 1
6484 #define RTE_ETH_TX_DESC_UNAVAIL 2
6520 static inline int rte_eth_tx_descriptor_status(uint16_t port_id,
6521 uint16_t queue_id, uint16_t offset)
6523 struct rte_eth_fp_ops *p;
6526 #ifdef RTE_ETHDEV_DEBUG_TX
6527 if (port_id >= RTE_MAX_ETHPORTS ||
6528 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6529 RTE_ETHDEV_LOG_LINE(ERR,
6530 "Invalid port_id=%u or queue_id=%u",
6537 p = &rte_eth_fp_ops[port_id];
6538 qd = p->txq.data[queue_id];
6540 #ifdef RTE_ETHDEV_DEBUG_TX
6541 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6545 if (p->tx_descriptor_status == NULL)
6547 return p->tx_descriptor_status(qd, offset);
6569 uint16_t rte_eth_call_tx_callbacks(uint16_t port_id, uint16_t queue_id,
6570 struct rte_mbuf **tx_pkts, uint16_t nb_pkts,
void *opaque);
6643 static inline uint16_t
6645 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6647 struct rte_eth_fp_ops *p;
6650 #ifdef RTE_ETHDEV_DEBUG_TX
6651 if (port_id >= RTE_MAX_ETHPORTS ||
6652 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6653 RTE_ETHDEV_LOG_LINE(ERR,
6654 "Invalid port_id=%u or queue_id=%u",
6661 p = &rte_eth_fp_ops[port_id];
6662 qd = p->txq.data[queue_id];
6664 #ifdef RTE_ETHDEV_DEBUG_TX
6665 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
6668 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Tx queue_id=%u for port_id=%u",
6674 #ifdef RTE_ETHDEV_RXTX_CALLBACKS
6684 cb = rte_atomic_load_explicit(&p->txq.clbk[queue_id],
6685 rte_memory_order_relaxed);
6687 nb_pkts = rte_eth_call_tx_callbacks(port_id, queue_id,
6688 tx_pkts, nb_pkts, cb);
6692 nb_pkts = p->tx_pkt_burst(qd, tx_pkts, nb_pkts);
6694 rte_ethdev_trace_tx_burst(port_id, queue_id, (
void **)tx_pkts, nb_pkts);
6751 #ifndef RTE_ETHDEV_TX_PREPARE_NOOP
6753 static inline uint16_t
6755 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6757 struct rte_eth_fp_ops *p;
6760 #ifdef RTE_ETHDEV_DEBUG_TX
6761 if (port_id >= RTE_MAX_ETHPORTS ||
6762 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6763 RTE_ETHDEV_LOG_LINE(ERR,
6764 "Invalid port_id=%u or queue_id=%u",
6772 p = &rte_eth_fp_ops[port_id];
6773 qd = p->txq.data[queue_id];
6775 #ifdef RTE_ETHDEV_DEBUG_TX
6777 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Tx port_id=%u", port_id);
6782 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Tx queue_id=%u for port_id=%u",
6789 if (!p->tx_pkt_prepare)
6792 return p->tx_pkt_prepare(qd, tx_pkts, nb_pkts);
6806 static inline uint16_t
6838 static inline uint16_t
6843 uint16_t to_send = buffer->
length;
6854 buffer->error_callback(&buffer->
pkts[sent],
6855 (uint16_t)(to_send - sent),
6856 buffer->error_userdata);
6956 static inline uint16_t
6958 uint16_t tx_port_id, uint16_t tx_queue_id,
6961 struct rte_eth_fp_ops *p1, *p2;
6965 #ifdef RTE_ETHDEV_DEBUG_TX
6966 if (tx_port_id >= RTE_MAX_ETHPORTS ||
6967 tx_queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6968 RTE_ETHDEV_LOG_LINE(ERR,
6969 "Invalid tx_port_id=%u or tx_queue_id=%u",
6970 tx_port_id, tx_queue_id);
6976 p1 = &rte_eth_fp_ops[tx_port_id];
6977 qd1 = p1->txq.data[tx_queue_id];
6979 #ifdef RTE_ETHDEV_DEBUG_TX
6980 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port_id, 0);
6983 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Tx queue_id=%u for port_id=%u",
6984 tx_queue_id, tx_port_id);
6988 if (p1->recycle_tx_mbufs_reuse == NULL)
6991 #ifdef RTE_ETHDEV_DEBUG_RX
6992 if (rx_port_id >= RTE_MAX_ETHPORTS ||
6993 rx_queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6994 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid rx_port_id=%u or rx_queue_id=%u",
6995 rx_port_id, rx_queue_id);
7001 p2 = &rte_eth_fp_ops[rx_port_id];
7002 qd2 = p2->rxq.data[rx_queue_id];
7004 #ifdef RTE_ETHDEV_DEBUG_RX
7005 RTE_ETH_VALID_PORTID_OR_ERR_RET(rx_port_id, 0);
7008 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid Rx queue_id=%u for port_id=%u",
7009 rx_queue_id, rx_port_id);
7013 if (p2->recycle_rx_descriptors_refill == NULL)
7019 nb_mbufs = p1->recycle_tx_mbufs_reuse(qd1, recycle_rxq_info);
7028 p2->recycle_rx_descriptors_refill(qd2, nb_mbufs);
7103 struct rte_eth_fp_ops *fops;
7107 #ifdef RTE_ETHDEV_DEBUG_TX
7109 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid port_id=%u", port_id);
7114 if (queue_id >= RTE_MAX_QUEUES_PER_PORT) {
7115 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid queue_id=%u for port_id=%u",
7123 fops = &rte_eth_fp_ops[port_id];
7124 qd = fops->txq.data[queue_id];
7126 #ifdef RTE_ETHDEV_DEBUG_TX
7128 RTE_ETHDEV_LOG_LINE(ERR,
"Invalid queue_id=%u for port_id=%u",
7134 if (fops->tx_queue_count == NULL) {
7139 rc = fops->tx_queue_count(qd);
7142 rte_eth_trace_tx_queue_count(port_id, queue_id, rc);
int rte_eth_dev_stop(uint16_t port_id)
struct rte_eth_vmdq_dcb_tx_conf vmdq_dcb_tx_conf
int rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id, struct rte_eth_pfc_conf *pfc_conf)
int rte_eth_promiscuous_disable(uint16_t port_id)
__extension__ uint32_t multi_pools
int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
__rte_experimental int rte_eth_tx_descriptor_dump(uint16_t port_id, uint16_t queue_id, uint16_t offset, uint16_t num, FILE *file)
struct rte_eth_dev_portconf default_rxportconf
#define __rte_always_inline
#define RTE_ETH_DCB_NUM_USER_PRIORITIES
uint16_t rte_eth_dev_count_avail(void)
int rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *time)
rte_eth_event_macsec_type
char info[RTE_ETH_BURST_MODE_INFO_SIZE]
const uint32_t * dev_flags
int rte_eth_timesync_read_time(uint16_t port_id, struct timespec *time)
struct rte_eth_rxseg_capa rx_seg_capa
uint64_t rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
__rte_experimental int rte_eth_dev_priv_dump(uint16_t port_id, FILE *file)
int rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_queue, uint16_t nb_tx_queue, const struct rte_eth_conf *eth_conf)
int rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
static uint16_t rte_eth_tx_prepare(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
struct rte_device * device
struct rte_eth_vmdq_tx_conf vmdq_tx_conf
__rte_experimental int rte_eth_speed_lanes_get(uint16_t port_id, uint32_t *lanes)
const struct rte_eth_rxtx_callback * rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
uint64_t q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS]
static __rte_experimental int rte_eth_tx_queue_count(uint16_t port_id, uint16_t queue_id)
struct rte_eth_thresh rx_thresh
uint16_t rte_eth_find_next(uint16_t port_id)
__rte_experimental int rte_eth_rx_descriptor_dump(uint16_t port_id, uint16_t queue_id, uint16_t offset, uint16_t num, FILE *file)
int rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
int rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info) __rte_warn_unused_result
int rte_eth_led_off(uint16_t port_id)
int rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
static int rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id, uint16_t offset)
uint32_t locked_device_memory
__rte_experimental int rte_eth_dev_hairpin_capability_get(uint16_t port_id, struct rte_eth_hairpin_cap *cap)
struct rte_eth_conf::@151 rx_adv_conf
__rte_experimental int rte_eth_dev_map_aggr_tx_affinity(uint16_t port_id, uint16_t tx_queue_id, uint8_t affinity)
int rte_eth_dev_rss_reta_update(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
static __rte_experimental uint16_t rte_eth_recycle_mbufs(uint16_t rx_port_id, uint16_t rx_queue_id, uint16_t tx_port_id, uint16_t tx_queue_id, struct rte_eth_recycle_rxq_info *recycle_rxq_info)
int rte_eth_dev_rss_hash_update(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
__rte_experimental int rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
uint64_t rx_queue_offload_capa
int rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats, unsigned int n)
__rte_experimental int rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
__rte_experimental int rte_eth_dev_count_aggr_ports(uint16_t port_id)
int rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs)
int rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id, int epfd, int op, void *data)
int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
enum rte_eth_tx_mq_mode mq_mode
int rte_eth_link_get(uint16_t port_id, struct rte_eth_link *link) __rte_warn_unused_result
int rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
uint64_t tx_queue_offload_capa
uint8_t enable_default_pool
uint32_t max_hash_mac_addrs
int rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
uint16_t rte_eth_find_next_sibling(uint16_t port_id_start, uint16_t ref_port_id)
uint64_t q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
int rte_eth_dev_get_eeprom_length(uint16_t port_id)
struct rte_eth_rss_conf rss_conf
int rte_eth_dev_close(uint16_t port_id)
int rte_eth_dev_rx_intr_enable(uint16_t port_id, uint16_t queue_id)
__rte_experimental int rte_eth_rx_avail_thresh_set(uint16_t port_id, uint16_t queue_id, uint8_t avail_thresh)
int rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id, uint8_t stat_idx)
int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_txq_info *qinfo)
__rte_experimental const char * rte_eth_dev_rss_algo_name(enum rte_eth_hash_function rss_algo)
int rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
uint32_t dcb_capability_en
__rte_experimental int rte_eth_timesync_adjust_freq(uint16_t port_id, int64_t ppm)
uint64_t q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
struct rte_eth_switch_info switch_info
int rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
int rte_eth_dev_callback_unregister(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
int rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
int rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
union rte_eth_conf::@152 tx_adv_conf
int rte_eth_dev_set_link_up(uint16_t port_id)
int rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp, uint32_t flags)
struct rte_eth_thresh tx_thresh
struct rte_eth_desc_lim rx_desc_lim
__rte_experimental int rte_eth_tx_queue_is_valid(uint16_t port_id, uint16_t queue_id)
int rte_eth_dev_get_vlan_offload(uint16_t port_id)
__rte_experimental int rte_eth_speed_lanes_get_capability(uint16_t port_id, struct rte_eth_speed_lanes_capa *speed_lanes_capa, unsigned int num)
int rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, unsigned int socket_id, const struct rte_eth_txconf *tx_conf)
int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
int rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *link) __rte_warn_unused_result
uint8_t rx_deferred_start
__rte_experimental int rte_eth_dev_get_reg_info_ext(uint16_t port_id, struct rte_dev_reg_info *info)
int(* rte_eth_dev_cb_fn)(uint16_t port_id, enum rte_eth_event_type event, void *cb_arg, void *ret_param)
struct rte_eth_rxmode rxmode
uint64_t q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
enum rte_eth_nb_pools nb_queue_pools
#define RTE_ETH_MQ_RX_RSS_FLAG
uint32_t rte_eth_speed_bitflag(uint32_t speed, int duplex)
int rte_eth_dev_owner_set(const uint16_t port_id, const struct rte_eth_dev_owner *owner)
#define RTE_ETH_XSTATS_NAME_SIZE
int rte_eth_dev_rss_hash_conf_get(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
__rte_experimental int rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma, unsigned int num)
struct rte_eth_desc_lim tx_desc_lim
int rte_eth_timesync_disable(uint16_t port_id)
int rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *mac_addr)
__rte_experimental int rte_eth_rx_avail_thresh_query(uint16_t port_id, uint16_t *queue_id, uint8_t *avail_thresh)
__rte_experimental int rte_eth_representor_info_get(uint16_t port_id, struct rte_eth_representor_info *info)
__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id, struct rte_eth_pfc_queue_conf *pfc_queue_conf)
void rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
void * rte_eth_dev_get_sec_ctx(uint16_t port_id)
__rte_experimental int rte_eth_speed_lanes_set(uint16_t port_id, uint32_t speed_lanes)
__rte_experimental int rte_eth_fec_get_capability(uint16_t port_id, struct rte_eth_fec_capa *speed_fec_capa, unsigned int num)
struct rte_eth_vmdq_dcb_conf::@147 pool_map[RTE_ETH_VMDQ_MAX_VLAN_FILTERS]
struct rte_mempool ** rx_mempools
__rte_experimental int rte_eth_xstats_set_counter(uint16_t port_id, uint64_t id, int on_off)
int rte_eth_stats_reset(uint16_t port_id)
int rte_eth_allmulticast_enable(uint16_t port_id)
struct rte_eth_txconf default_txconf
__rte_experimental int rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id, struct rte_power_monitor_cond *pmc)
uint32_t offset_align_log2
int rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *set_ptypes, unsigned int num)
void rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
int rte_eth_dev_udp_tunnel_port_add(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
struct rte_eth_dcb_rx_conf dcb_rx_conf
enum rte_eth_err_handle_mode err_handle_mode
struct rte_eth_vmdq_rx_conf vmdq_rx_conf
int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
#define __rte_cache_min_aligned
__rte_experimental int rte_eth_dev_get_module_info(uint16_t port_id, struct rte_eth_dev_module_info *modinfo) __rte_warn_unused_result
uint16_t rte_eth_find_next_of(uint16_t port_id_start, const struct rte_device *parent)
enum rte_eth_rx_mq_mode mq_mode
int rte_eth_dev_callback_register(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
enum rte_eth_nb_pools nb_queue_pools
int rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
static uint16_t rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
int rte_eth_allmulticast_disable(uint16_t port_id)
int rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id, int on)
int rte_eth_dev_start(uint16_t port_id)
__rte_experimental int rte_eth_cman_config_get(uint16_t port_id, struct rte_eth_cman_config *config)
__rte_experimental int rte_eth_ip_reassembly_capability_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *capa)
int rte_eth_dev_reset(uint16_t port_id)
int rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids, uint64_t *values, unsigned int size)
#define RTE_ETH_MQ_RX_DCB_FLAG
struct rte_eth_dcb_tx_conf dcb_tx_conf
__rte_experimental int rte_eth_dev_get_module_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info) __rte_warn_unused_result
enum rte_eth_fc_mode mode_capa
__rte_experimental int rte_eth_ip_reassembly_conf_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *conf)
int rte_eth_dev_rx_intr_disable(uint16_t port_id, uint16_t queue_id)
int rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer, buffer_tx_error_fn callback, void *userdata)
__rte_experimental int rte_eth_buffer_split_get_supported_hdr_ptypes(uint16_t port_id, uint32_t *ptypes, int num) __rte_warn_unused_result
void rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
uint64_t q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
int rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
int rte_eth_dev_is_removed(uint16_t port_id)
uint16_t(* rte_tx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, void *user_param)
__rte_experimental int rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
int rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id, uint16_t *nb_rx_desc, uint16_t *nb_tx_desc)
int rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *mac_addr)
__rte_experimental int rte_eth_recycle_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_recycle_rxq_info *recycle_rxq_info)
__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id, struct rte_eth_pfc_queue_info *pfc_queue_info)
int rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr, uint32_t pool)
int rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
struct rte_mbuf * next_frag
int rte_eth_xstats_reset(uint16_t port_id)
#define RTE_ETH_MQ_RX_VMDQ_FLAG
__rte_experimental int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports, size_t len, uint32_t direction)
uint16_t refill_requirement
int rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name, uint64_t *id)
int rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
__extension__ uint8_t hw_vlan_insert_pvid
enum rte_eth_fc_mode mode
const struct rte_eth_rxtx_callback * rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id, rte_tx_callback_fn fn, void *user_param)
uint64_t flow_type_rss_offloads
#define RTE_ETH_VMDQ_MAX_VLAN_FILTERS
uint16_t rte_eth_dev_count_total(void)
int rte_eth_promiscuous_enable(uint16_t port_id)
int rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
__rte_experimental int rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf) __rte_warn_unused_result
union rte_eth_rxseg * rx_seg
int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *ptypes, int num) __rte_warn_unused_result
int rte_eth_dev_owner_new(uint64_t *owner_id)
struct rte_eth_dev_portconf default_txportconf
const char * rte_eth_dev_tx_offload_name(uint64_t offload)
int rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size) __rte_warn_unused_result
__rte_experimental int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
int rte_eth_dev_owner_delete(const uint64_t owner_id)
rte_eth_event_macsec_subtype
static __rte_always_inline uint16_t rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer, struct rte_mbuf *tx_pkt)
__extension__ uint8_t hw_vlan_reject_untagged
int rte_eth_dev_set_mc_addr_list(uint16_t port_id, struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr)
uint32_t use_locked_device_memory
int rte_eth_dev_get_dcb_info(uint16_t port_id, struct rte_eth_dcb_info *dcb_info)
rte_eth_event_ipsec_subtype
struct rte_eth_intr_conf intr_conf
struct rte_eth_vmdq_rx_conf::@148 pool_map[RTE_ETH_VMDQ_MAX_VLAN_FILTERS]
int rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id, uint8_t stat_idx)
int rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
__rte_experimental const char * rte_eth_link_speed_to_str(uint32_t link_speed)
static int rte_eth_rx_queue_count(uint16_t port_id, uint16_t queue_id)
int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_rxq_info *qinfo)
__rte_experimental int rte_eth_find_rss_algo(const char *name, uint32_t *algo)
int rte_eth_dev_socket_id(uint16_t port_id)
int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx, uint32_t tx_rate)
struct rte_mbuf ** mbuf_ring
uint8_t enable_default_pool
int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
int rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
int rte_eth_dev_set_vlan_ether_type(uint16_t port_id, enum rte_vlan_type vlan_type, uint16_t tag_type)
int rte_eth_xstats_get_names_by_id(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size, uint64_t *ids)
__rte_experimental int rte_eth_xstats_query_state(uint16_t port_id, uint64_t id)
__rte_experimental const char * rte_eth_dev_capability_name(uint64_t capability)
__rte_experimental int rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, const struct rte_eth_hairpin_conf *conf)
static uint64_t rte_eth_rss_hf_refine(uint64_t rss_hf)
__rte_experimental int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
__rte_experimental int rte_eth_ip_reassembly_conf_set(uint16_t port_id, const struct rte_eth_ip_reassembly_params *conf)
int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr, uint8_t on)
__rte_experimental int rte_eth_cman_config_init(uint16_t port_id, struct rte_eth_cman_config *config)
int rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
int rte_eth_dev_rss_reta_query(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
int rte_eth_promiscuous_get(uint16_t port_id)
int rte_eth_led_on(uint16_t port_id)
int rte_eth_timesync_read_tx_timestamp(uint16_t port_id, struct timespec *timestamp)
__extension__ uint8_t hw_vlan_reject_tagged
__rte_experimental int rte_eth_rx_queue_is_valid(uint16_t port_id, uint16_t queue_id)
int rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
__rte_experimental int rte_eth_cman_config_set(uint16_t port_id, const struct rte_eth_cman_config *config)
__rte_experimental int rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, const struct rte_eth_hairpin_conf *conf)
uint8_t mac_ctrl_frame_fwd
uint16_t(* rte_rx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts, void *user_param)
int rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info) __rte_warn_unused_result
enum rte_eth_fc_mode mode
int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
struct rte_eth_vmdq_dcb_conf vmdq_dcb_conf
uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES]
uint8_t tx_deferred_start
int rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
uint32_t max_lro_pkt_size
int rte_eth_xstats_get_names(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size)
struct rte_eth_fc_conf fc
const struct rte_eth_rxtx_callback * rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
int rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
int rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
struct rte_eth_txmode txmode
int rte_eth_allmulticast_get(uint16_t port_id)
int rte_eth_dev_is_valid_port(uint16_t port_id)
int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
#define __rte_warn_unused_result
uint32_t max_lro_pkt_size
int rte_eth_timesync_enable(uint16_t port_id)
struct rte_eth_rxconf default_rxconf
static uint16_t rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
struct rte_eth_hairpin_queue_cap tx_cap
__rte_experimental int rte_eth_cman_info_get(uint16_t port_id, struct rte_eth_cman_info *info)
int rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
int rte_eth_dev_set_link_down(uint16_t port_id)
int rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
uint16_t rte_eth_iterator_next(struct rte_dev_iterator *iter)
__rte_experimental int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
struct rte_eth_hairpin_queue_cap rx_cap
int rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
const char * rte_eth_dev_rx_offload_name(uint64_t offload)
static uint16_t rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer)
int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, unsigned int socket_id, const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mb_pool)