24 #define RTE_PDCP_CTRL_PDU_SIZE_MAX 9000u
31 #define RTE_PDCP_MAC_I_LEN 4
38 RTE_PDCP_CTRL_PDU_TYPE_STATUS_REPORT = 0,
39 RTE_PDCP_CTRL_PDU_TYPE_ROHC_FEEDBACK = 1,
40 RTE_PDCP_CTRL_PDU_TYPE_EHC_FEEDBACK = 2,
41 RTE_PDCP_CRTL_PDU_TYPE_UDC_FEEDBACK = 3,
51 RTE_PDCP_PDU_TYPE_CTRL = 0,
52 RTE_PDCP_PDU_TYPE_DATA = 1,
60 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
63 #elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
75 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
79 #elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
92 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
96 #elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
110 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
112 uint8_t pdu_type : 3;
114 #elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
116 uint8_t pdu_type : 3;
#define __rte_packed_begin